Very small swing high performance CMOS static memory (multi-port register file) with power reducing column multiplexing scheme
US6903996B2 · kind B2 · utility
2Cited by
12References
35Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 10, 2003 |
| Grant date | Jun 7, 2005 |
| Priority date | — |
| Expiry date | Jan 10, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/412
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention relates to storage element. At least one read port is coupled to the storage element and a sensing device is coupled to the read port, where the read port is coupled to the storage element in an isolated manner. The sensing device is adapted to sense a small voltage swing. The sensing device includes two inverters comprising input offset and gain stages.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.