Mark Slamowitz
11Patents
5h-index
7Co-inventors
59Inventor score
Filing activity: Jun 15, 1989 → Nov 12, 2009
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6519204B2 | Very small swing high performance CMOS static memory (multi-port register file) with power reducing column multiplexing scheme | Physics | 17 | Expired |
| US6639866B2 | Very small swing high performance asynchronous CMOS static memory (multi-port register file) with power reducing column multiplexing scheme | Physics | 8 | Expired |
| US6943596B2 | Power-on reset circuit for use in low power supply voltage applications | Electricity | 7 | Expired |
| US5043939A | Soft error immune memory | Physics | 7 | Expired |
| US8076965B2 | Low leakage data retention flip flop | Electricity | 6 | Active |
| US7251175B2 | Very small swing high performance asynchronous CMOS static memory (multi-port register file) with power reducing column multiplexing scheme | Physics | 5 | Expired |
| US6822918B2 | Very small swing high performance asynchronous CMOS static memory (multi-port register file) with power reducing column multiplexing scheme | Physics | 4 | Expired |
| US7227411B2 | Apparatus for a differential self-biasing CMOS amplifier | Electricity | 3 | Expired |
| US6903996B2 | Very small swing high performance CMOS static memory (multi-port register file) with power reducing column multiplexing scheme | Physics | 2 | Expired |
| US7639549B2 | Very small swing high performance asynchronous CMOS static memory (multi-port register file) with power reducing column multiplexing scheme | Physics | 1 | Active |
| US7986570B2 | Very small swing high performance asynchronous CMOS static memory (multi-port register file) with power reducing column multiplexing scheme | Physics | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.