Apparatus and methods for storing and processing header information in a network switch
US6904043B1 · kind B1 · utility
14Cited by
4References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 21, 1999 |
| Grant date | Jun 7, 2005 |
| Priority date | — |
| Expiry date | May 21, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/354
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A network switch configured for switching data packets across multiple ports uses an internal memory to store frame headers for processing by decision making logic. The internal memory stores frame headers in a queue configured to store a number of the frame headers for each of the receive ports. A scheduler is included for facilitating the transfer the data from the queues to the decision making logic according to a predetermined priority. The scheduler is also able allocate the time slots in accordance with data traffic at the corresponding receive ports to maximize data throughput.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.