Method and implemention of a traceback-free parallel viterbi decoder
US6904105B1 · kind B1 · utility
1Cited by
8References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 27, 2000 |
| Grant date | Jun 7, 2005 |
| Priority date | — |
| Expiry date | Jul 26, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/41
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The traceback operation for a Viterbi algorithm can be minimized by producing optimal path values for each state in the trellis, and updating the optimal path values at each state for each symbol. The optimal path value can be used to quickly determine the output values for the system without requiring a traceback which would typically require a memory read for each transmitted symbol.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.