Notch-free etching of high aspect SOI structures using alternating deposition and etching and pulsed plasma
US6905626B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 19, 2003 |
| Grant date | Jun 14, 2005 |
| Priority date | — |
| Expiry date | Sep 29, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/30655
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A method of preventing notching during a cyclical etching and deposition of a substrate with an inductively coupled plasma source is provided by the present invention. In accordance with the method, the inductively coupled plasma source is pulsed to prevent charge build up on the substrate. The off state of the inductively coupled plasma source is selected to be long enough that charge bleed off can occur, but not so long that reduced etch rates result due to a low duty cycle. The pulsing may be controlled such that it only occurs when the substrate is etched such that an insulating layer is exposed. A bias voltage may also be provided to the insulating layer and the bias voltage may be pulsed in phase or out of phase with the pulsing of the inductively coupled plasma source.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.