RAM
US6908811B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 2, 2004 |
| Grant date | Jun 21, 2005 |
| Priority date | — |
| Expiry date | Apr 2, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/482
Abstract
A method for forming in monolithic form a DRAM-type memory, including the steps of forming, on a substrate, parallel strips including a lower insulating layer, a strongly-conductive layer, a single-crystal semiconductor layer, and an upper insulating layer; digging, perpendicularly to the strips, into the upper insulating layer and into a portion of the semiconductor layer, first and second parallel trenches, each first and second trench being shared by neighboring cells; forming, in each first trench, a first conductive line according to the strip width; forming, in each second trench, two second distinct parallel conductive lines, insulated from the peripheral layers; filling the first and second trenches with an insulating material; removing the remaining portions of the upper insulating layer; and depositing a conductive layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.