Non-volatile memory with functional capability of simultaneous modification of the content and burst mode read or page mode read
US6912598B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 28, 2000 |
| Grant date | Jun 28, 2005 |
| Priority date | — |
| Expiry date | Jul 23, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electrically alterable semiconductor memory comprises at least two substantially independent memory banks, and a first control circuit for controlling operations of electrical alteration of the content of the memory. The first control circuit permits the selective execution of an operation of electrical alteration of the content of one of the at least two memory banks. The memory also comprises second control circuit that permits, simultaneously with said operation of electrical alteration of the content of one of the at least two memory banks, a burst mode, page mode, or standard read operation for reading the content of the other memory bank.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.