Patent · US Expired

Semi-conductor component with clock relaying device

US6917562B2 · kind B2 · utility

4Cited by
4References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 10, 2003
Grant dateJul 12, 2005
Priority date
Expiry dateJan 1, 2024

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C11/4076
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

The invention involves a component with a connection (3b), as well as at least one further connection (3a), whereby differential input clock pulses (CLK, CLKT; /CLK, /CLKT) can be applied to the connections (3a, 3b), or a single input clock pulse (CLK, CLKT) applied to the connection (3b) and/or to the further connection (3a)—, and where the component in addition has a first and a second pulse relay device (50, 51), where the first pulse relay device (50) has been provided for relaying differential input clock pulses (CLK, CLKT; /CLK, /CLKT), and the second pulse relay device (51) for relaying a single input clock pulse (CLK, CLKT).

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.