Ring-resister controlled DLL with fine delay line and direct skew sensing detector
US6919745B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 7, 2003 |
| Grant date | Jul 19, 2005 |
| Priority date | — |
| Expiry date | Sep 18, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/089
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention related to a ring-resister controlled DLL with fine delay line and a direct skew sensing detector, which is applicable to circuitry for compensating skew between external and internal clocks. The ring-register controlled delay locked loop according to the present invention comprises: a first delay group including a plurality of unit delay elements which are lineally coupled to each other for delaying an input clock signal; a second delay group including a plurality of unit delay elements which are circularly coupled to each other for delaying an output signal from the first delay group; a first control means for determining an amount of lineal delay in the first delay group; and a second control means for determining an amount of circular delay in the first delay group.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.