Clock selection circuit for selecting between an external clock and a clock generated by comparing a count value with a setting value
US6920577B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 18, 2001 |
| Grant date | Jul 19, 2005 |
| Priority date | — |
| Expiry date | Jan 10, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A setting value is initially stored in a comparison and coincidence register. Thereafter, a value of a count signal is incremented in a base timer while resetting the value of the count signal to zero each time the value of the count signal reaches a prescribed value. A coincidence signal set to “1” is output from the comparison and coincidence register each time the setting value agrees with the value of the count signal, and a clock signal is produced in an RS flip-flop according to the coincidence signal. A data transmission is performed each time the coincidence signal is received in a transmission shift register. On a reception side, the clock signal is received, and the data is received according to the clock signal. Therefore, in cases where a desired setting value is stored in the comparison and coincidence register, the repetition period of the data transmission and reception can be freely changed. Also, the timer function of the base circuit is, as it is, used to transmit or receive data, the number of elements required in the data input and output device can be reduced in hardware.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.