Method and apparatus for testing circuit modules
US6920582B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2002 |
| Grant date | Jul 19, 2005 |
| Priority date | — |
| Expiry date | Jun 13, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/3185
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method and apparatus for testing by sampling vectors circuit modules designated as channel models or as control modules and containing scan chains. Use is made of a test register which provides at least one control sampling mode signal for control modules and furthermore provides at least one channel sampling mode signal for channel modules. Channel modules and control modules can occur as circuit modules multiply with identical scan chains, enabling efficient testing in a manner that saves memory space. A logic is designed for the read-out of sampling output signals after testing of the scan chains via a read-out terminal unit of a test device, thus providing a comparison with desired sampling output signals for channel modules or for control modules in a comparator unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.