Transistor with dopant-bearing metal in source and drain
US6921691B1 · kind B1 · utility
85Cited by
1References
29Claims
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Assignee
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Key dates
| Filing date | Mar 18, 2004 |
| Grant date | Jul 26, 2005 |
| Priority date | — |
| Expiry date | Apr 29, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/693
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A transistor and method of manufacturing thereof. A gate dielectric and gate are formed over a workpiece, and the source and drain regions of a transistor are recessed. The recesses are filled with a dopant-bearing metal, and a low-temperature anneal process is used to form doped regions within the workpiece adjacent the dopant-bearing metal regions. A transistor having a small effective oxide thickness and a well-controlled junction depth is formed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.