Method of fabricating a metal-insulator-metal capacitor
US6924207B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 29, 2003 |
| Grant date | Aug 2, 2005 |
| Priority date | — |
| Expiry date | Oct 29, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/212
Abstract
A method of fabricating a semiconductor device is provided. The method includes forming an interconnection line over a ssubstrate. The interconnection line functions as a first electrode. A first insulating layer is formed on the substrate including the metal interconnection line. An electrode layer and an oxide layer are formed on the first insulating layer. A photoresist pattern is formed on the oxide layer. The oxide layer and the electrode layer are etched using the photoresist pattern as an etching mask. As a result, a second electrode and an oxide layer pattern, which are stacked, are formed over the interconnection line. At least the electrode layer is etched using a wet etching technique. The photoresist pattern is then removed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.