Method for forming polysilicon germanium layer
US6924219B1 · kind B1 · utility
2Cited by
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24Claims
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Key dates
| Filing date | May 21, 2004 |
| Grant date | Aug 2, 2005 |
| Priority date | — |
| Expiry date | May 21, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/32055
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a polysilicon germanium layer on a gate oxide layer without forming a polysilicon seed layer previously is disclosed. The method uses a chemical vapor deposition process at a temperature range between about 500° C. to about 600° C. by using a Si2H6 (disilane) gas and a germanium-containing gas as precursors to form a polysilicon germanium layer on a gate dielectric layer as a gate electrode layer. The polysilicon germanium layer directly formed on the gate dielectric layer has a smooth surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.