Compact SRAM cell with FinFET
US6924560B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 8, 2003 |
| Grant date | Aug 2, 2005 |
| Priority date | — |
| Expiry date | Aug 8, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/904
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system is disclosed for an SRAM device cell having at least one device of a first semiconductor type and at lease one device of a second semiconductor type. The cell has a first device of the first type constructed as a part of a first FinFET having one or more devices of the first type, a first device of the second type whose poly region is an extension of a poly region of the first device of the first type with no contact needed to connect therebetween, wherein the two devices are constructed using a silicon-on-insulator (SOI) technology so that they are separated by an insulator region therebetween so as to minimize the distance between the two devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.