System for testing one or more groups of IC-chips while concurrently loading/unloading another group
US6924636B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 10, 2003 |
| Grant date | Aug 2, 2005 |
| Priority date | — |
| Expiry date | Nov 13, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31905
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An electromechanical system for testing IC-chips includes a total of N chip holding subassemblies, where N is an integer greater than one and where each chip holding subassembly has sockets for holding a group of IC-modules that include the IC-chips; a moving mechanism for automatically moving the i-th chip holding subassembly from a load position in the system to a test position in the system, and visa-versa, where i ranges from 1 to N and changes with time in a sequence; and a temperature control mechanism which contacts the IC-modules at the test position. Between the moving of the i-th chip holding subassembly and the next chip holding subassembly in the sequence, the IC-chips are burn-in tested on all N of the chip holding subassemblies. Also, while the i-th chip holding subassembly is being moved, burn-in testing of IC-chips on the remaining N-1 chip holding subassemblies continues.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.