Semiconductor device with non-volatile memory and random access memory
US6928512B2 · kind B2 · utility
94Cited by
2References
18Claims
0Family size
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Key dates
| Filing date | Jun 6, 2002 |
| Grant date | Aug 9, 2005 |
| Priority date | — |
| Expiry date | Nov 8, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory, an SRAM, a DRAM and a control circuit are module-formed into a single packaged. The control circuit assigns addresses to the SRAM and addresses to the DRAM and data necessary to be held for a long period of time is saved in the SRAM. Two chips of DRAM are mapped to the same address space and refreshed alternately. The plural chips are arranged such that they are mutually laminated, and they are wired by means of a BGA or inter-chip bonding.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.