Digital system of adjusting delays on circuit boards
US6928571B1 · kind B1 · utility
91Cited by
10References
35Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 15, 2000 |
| Grant date | Aug 9, 2005 |
| Priority date | — |
| Expiry date | Apr 24, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/028
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Technique and system for adjusting delays between signals. A number of signals are produced, and delays between the signals are determined. Programmable delay elements are used, each driven by a signal indicative of one of the delays. By delaying each of a number of the signals by different amounts, the signals can be caused to arrive at desired times, e.g., in synchronism with one another.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.