Etching a metal hard mask for an integrated circuit structure
US6930048B1 · kind B1 · utility
38Cited by
3References
32Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 18, 2002 |
| Grant date | Aug 16, 2005 |
| Priority date | — |
| Expiry date | Dec 23, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76832
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention is a method of etching an integrated circuit (IC) structure that includes a metal hard mask layer. The etching of the metal hard mask layer is performed by first feeding a gas mixture comprising a fluorine containing gas and oxygen (O2) gas to a reactor. The method then proceeds to generate a plasma that etches the metal hard mask layer. The method can be applied to either performing a via etch or a trench etch. Additionally, the invention teaches the removal of a photoresist layer without affecting the metal hard mask layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.