Array of programmable cells with customized interconnections
US6930511B2 · kind B2 · utility
257Cited by
68References
18Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 11, 2004 |
| Grant date | Aug 16, 2005 |
| Priority date | — |
| Expiry date | Aug 11, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17796
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A logic array may include an array of programmable cells having a multiplicity of inputs and a multiplicity of outputs; and customized interconnections providing permanent direct interconnections among at least a plurality of the multiplicity of inputs and at least a plurality of the multiplicity of outputs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.