Patent assignee · US · COMPANY

eASIC CORPORATION

35Patents
15Active
35Granted
46Portfolio score

Filing activity: Mar 11, 1999 → Dec 9, 2015 · 5 expiring within 5 years

Most-cited patents

PatentTitleAreaCited byStatus
US6642744B2 Customizable and programmable cell array Electricity 494 Expired
US6819136B2 Customizable and programmable cell array Electricity 462 Expired
US6953956B2 Semiconductor device having borderless logic array and flexible I/O Electricity 462 Expired
US7105871B2 Semiconductor device Electricity 453 Expired
US6331790A Customizable and programmable cell array Electricity 326 Expired
US6756811B2 Customizable and programmable cell array Electricity 269 Expired
US7157937B2 Structured integrated circuit device Electricity 262 Expired
US6989687B2 Customizable and programmable cell array Electricity 260 Expired
US7098691B2 Structured integrated circuit device Electricity 259 Expired
US7068070B2 Customizable and programmable cell array Electricity 258 Expired
US6985012B2 Customizable and programmable cell array Electricity 258 Expired
US6930511B2 Array of programmable cells with customized interconnections Electricity 257 Expired
US7463062B2 Structured integrated circuit device Electricity 257 Active
US6686253B2 Method for design and manufacture of semiconductors Physics 255 Expired
US6331733A Semiconductor device Electricity 239 Expired
US6194912A Integrated circuit device Electricity 227 Expired
US7514959B2 Structured integrated circuit device Electricity 192 Expired
US6331789A Semiconductor device Electricity 83 Expired
US6236229A Integrated circuits which employ look up tables to provide highly efficient logic cells and logic functionalities Electricity 70 Expired
US8677306B1 Microcontroller controlled or direct mode controlled network-fabric on a structured ASIC Physics 33 Active
US8629548B1 Clock network fishbone architecture for a structured ASIC manufactured on a 28 NM CMOS process lithographic node Electricity 29 Active
US6245634A Method for design and manufacture of semiconductors Physics 29 Expired
US9024657B2 Architectural floorplan for a structured ASIC manufactured on a 28 NM CMOS process lithographic node or smaller Electricity 6 Active
US7689960B2 Programmable via modeling Physics 5 Active
US8436700B2 MEMS-based switching Electricity 5 Active

Source: USPTO / EPO open patent data. Counts and citation impact are objective bibliographic measures.