Patent · US Expired

Semiconductor memory device having an internal voltage generation circuit for selectively generating an internal voltage according to an external voltage level

US6930948B2 · kind B2 · utility

13Cited by
5References
11Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 15, 2003
Grant dateAug 16, 2005
Priority date
Expiry dateNov 20, 2023

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C5/147
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An external high/low voltage compatible semiconductor memory device includes an internal voltage pad, an internal voltage generation circuit, and an internal voltage control signal generation circuit. The internal voltage pad connects a low external voltage with an internal voltage, and the internal voltage generation circuit generates an internal voltage in response to an internal voltage control signal and a high external voltage. The internal voltage control signal generation circuit generates an internal voltage control signal according to an high or low external voltage. Thus, a database of the semiconductor memory device can be managed without classifying the database into databases for the high voltage and databases for the low voltage because of the internal voltage control signal. In addition, the internal voltage level is stable because charges provided to the internal voltage are regulated according to a voltage level of the external voltage.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.