Wafer interposer assembly
US6933617B2 · kind B2 · utility
8Cited by
150References
29Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 24, 2003 |
| Grant date | Aug 23, 2005 |
| Priority date | — |
| Expiry date | Sep 11, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/31511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A wafer interposer assembly and a system for building the same are disclosed. The wafer interposer assembly includes a semiconductor wafer (10) having a die (11) and a redistribution layer pad (13) electrically connected to the die (11). An epoxy layer (20) is deposited on the surface of the redistribution layer pad (13) and the die (11). An interposer pad (50) is positioned in an opening (40) in the epoxy layer (20) in electrical contact with the redistribution layer pad (13).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.