Method and system for determining transistor degradation mechanisms
US6933731B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 17, 2003 |
| Grant date | Aug 23, 2005 |
| Priority date | — |
| Expiry date | Feb 9, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/34
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a method for isolating degradation mechanisms in transistors includes providing a ring oscillator having a plurality of delay elements. Each delay element operates as a delay element through the use of one or more transistors of only a first type and no transistors of the opposite type. The method further includes operating the ring oscillator and measuring the frequency resulting from the ring oscillator over time. The magnitude of an isolated degradation mechanism is determined based on a comparison of the measured frequency and an expected frequency for the ring oscillator absent degradation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.