Trimming method and trimming device for a PLL circuit for two-point modulation
US6933798B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 22, 2003 |
| Grant date | Aug 23, 2005 |
| Priority date | — |
| Expiry date | Aug 22, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/1976
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In the case of a trimming method for a PLL circuit operating based on the principle of a two-point modulation, the PLL circuit is locked without any modulation being impressed and then an analog and a digital modulation signal are impressed into the locked PLL circuit. A signal that is characteristic of the PLL control error is tapped from the PLL circuit, and the modulation swing in the analog modulation signal is changed such that the characteristic signal has the same value as before the analog and digital modulation signals were impressed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.