Integrated circuit memory device including delay locked loop circuit and delay locked loop control circuit and method of controlling delay locked loop circuit
US6937534B2 · kind B2 · utility
12Cited by
3References
28Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 25, 2003 |
| Grant date | Aug 30, 2005 |
| Priority date | — |
| Expiry date | Sep 16, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/4067
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A DLL power supply of the integrated circuit memory device supplies power to the DLL circuit, and a control signal generator controls the DLL power supply to selectively supply power to the DLL circuit during a refresh mode of the integrated circuit memory device based on a selection signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.