DRAM power management
US6938119B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 18, 2002 |
| Grant date | Aug 30, 2005 |
| Priority date | — |
| Expiry date | Jun 18, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for limiting power consumption of a computer memory system. The system and method includes selecting a memory access rate. The selected memory access rate corresponds to a desired average memory power consumption rate. A first time interval is started as a current time interval. A memory system is accessed. If the memory access rate has not been exceeded, then the access is applied to the memory system. Alternatively, if the memory access rate has been exceeded, then the access is delayed until the current time interval has expired and a subsequent time interval is started as the current time interval and the access is applied to the memory system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.