System and method for evaluating signal trace discontinuities in a package design
US6938230B2 · kind B2 · utility
7Cited by
2References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 19, 2003 |
| Grant date | Aug 30, 2005 |
| Priority date | — |
| Expiry date | Jun 27, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/398
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method evaluates signal trace discontinuities in an electronic design of the type having one or more traces. The method includes the steps of formulating one or more trace discontinuity rules, processing the electronic design to determine whether the traces violate the trace discontinuity rules, and generating an indicator (e.g., a DRC) associated with the electronic design to identify violated trace discontinuity rules. Each level, each signal net, or a group of signal nets may be evaluated, for example, to ensure compliance with the trace discontinuity rules.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.