Method and manufacture of thin silicon on insulator (SOI) with recessed channel
US6939751B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 22, 2003 |
| Grant date | Sep 6, 2005 |
| Priority date | — |
| Expiry date | Dec 9, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
Abstract
An RSD FET device with a recessed channel is formed with a raised silicon sources and drains and a gate electrode structure formed on an SOI structure (a Si layer formed on a substrate) by the steps as follows. Form a SiGe layer over the Si layer and a RSD layer over the SiGe. Etch through the RSD layer and the SiGe to form a gate electrode space reaching down the Si layer. Form a pair of RSD regions separated by the gate electrode space. Line the walls of the gate electrode space with an internal etch stop layer and an inner sidewall spacers. Form a gate electrode inside the inner sidewall spacers on the Si layer. Form external sidewall spacers adjacent to the gate electrode between the RSD regions next to the inner sidewall spacers, and dope the RSD regions, whereby a recessed channel is formed in the SOI silicon layer between the raised source/drain regions thereabove and below the level of the SiGe layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.