Checkpointing of register file
US6941489B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 27, 2002 |
| Grant date | Sep 6, 2005 |
| Priority date | — |
| Expiry date | Jun 16, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1405
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention performs an extra read from a register of a register file prior to writing to that register. The data from the extra read is stored in a buffer (e.g., another register file). After a “checkpoint” period, a check is made as to whether any data errors have occurred; if there are no errors, the buffer is flushed and processing continues per normal; if there are errors, the register file is rewritten with contents from the buffer and the program counter is reset to the prior checkpoint, wherein after processing re-executes program instructions from the last checkpoint. The checkpointing period may be defined by the memory size of the buffer; typically that buffer has a fraction of the memory capacity of the register file, since a flush occurs at every checkpoint. The register file of the invention may utilize an extra read port with the register file to perform the extra read. The extra read may occur for every write to the register file; alternatively, the extra read may occur for a subset of the writes to the register file.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.