Method for manufacturing semiconductor device
US6943125B2 · kind B2 · utility
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15References
9Claims
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Assignee
Inventors
Key dates
| Filing date | Dec 18, 2003 |
| Grant date | Sep 13, 2005 |
| Priority date | — |
| Expiry date | Dec 18, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/958
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided is a method for manufacturing a semiconductor device including a plurality of different semiconductor elements with a transistor for fabricating the semiconductor device formed on a semiconductor substrate, an interlayer insulation film formed all over the upper part, and a hole trap site formed in the interlayer insulation film for preventing a mobile ion like H or moisture from penetrating, whereby it can be prevented that a leakage current increases abnormally where the voltage difference (Vgs) is lower than a threshold voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.