BI-CMOS integrated circuit

US6943413B2 · kind B2 · utility

Assignee

• SK hynix Inc. · KR

Inventor

• Steven S. Lee · Colorado Springs, US

Key dates

• Filing date: May 1, 2003
• Grant date: Sep 13, 2005
• Expiry date: May 1, 2023

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0109

Abstract

The invention concerns a BI-CMOS process, in which Field-Effect Transistors (FETs) and Bipolar Junction Transistors (BJTs) are manufactured on a common substrate. In several processing steps, FET structures are formed simultaneously with BJT structures. For example, in one step, polysilicon gate electrodes for the FETs and polysilicon emitters for the BJTs are formed simultaneously. In another aspect of the invention, a polysilicon layer is used to reduce channeling which would otherwise occur during an implant step.