Stacked device underfill and a method of fabrication
US6946384B2 · kind B2 · utility
219Cited by
3References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 6, 2003 |
| Grant date | Sep 20, 2005 |
| Priority date | — |
| Expiry date | Jun 6, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06524
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Numerous embodiments of a stacked device underfill and a method of formation are disclosed. In one embodiment, a method of forming stacked semiconductor device with an underfill comprises forming one or more layers of compliant material on at least a portion of the top surface of a substrate, said substrate, curing at least a portion of the semiconductor device, selectively removing a portion of the one or more layer of complaint material, and assembling the substrate into a stacked semiconductor device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.