Electrical device including dielectric layer formed by direct patterning process
US6946736B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Oct 23, 2002 |
| Grant date | Sep 20, 2005 |
| Priority date | — |
| Expiry date | Nov 16, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/36
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
Provided is a process for lithographically patterning a material on a substrate comprising the steps of (a) depositing a radiation sensitive material on the substrate by chemical vapor deposition; (b) selectively exposing the radiation sensitive material to radiation to form a pattern; and (c) developing the pattern using a supercritical fluid (SCF) as a developer. Also disclosed is a microstructure formed by the foregoing process. Also disclosed is a process for lithographically patterning a material on a substrate wherein after steps (a) and (b) above, the pattern is developed using a dry plasma etch. Also disclosed is a microstructure comprising a substrate; and a patterned dielectric layer, wherein the patterned dielectric layer comprises at least one two-dimensional feature having a dimensional tolerance more precise than 7%. Also disclosed is a microelectronic structure comprising a substrate; a plurality of transistors formed on the substrate; and a plurality of conductive features formed within a dielectric pattern, wherein the plurality of conductive features include at least one two-dimensional feature having a dimensional tolerance more precise than 7%.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.