Semiconductor device
US6949835B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 2004 |
| Grant date | Sep 27, 2005 |
| Priority date | — |
| Expiry date | Mar 26, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The size of a power amplifier module is reduced. The power amplifier module includes a module substrate, a lower chip flip-connected to the module substrate, an upper chip stacked face up onto the lower chip, a common electrode disposed on a back surface of the upper chip, plural wires for connecting the upper chip and the module substrate with each other, plural wires for connecting the common electrode and the module substrate with each other, plural chip parts mounted on the module substrate, and a sealing portion formed on the main surface of the module substrate. The common electrode is connected to the module substrate through wires to strengthen the GND of the upper chip. Since the lower chip is flip-connected to the module substrate, the difference in size between the upper and lower chips is diminished to attain a reduction in size of the power amplifier module.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.