Semiconductor integrated circuit capable of facilitating layout modification
US6954919B2 · kind B2 · utility
1Cited by
1References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 27, 2003 |
| Grant date | Oct 11, 2005 |
| Priority date | — |
| Expiry date | Nov 11, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/39
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit includes a variable region to be subjected to a layout modification in conjunction with a change of a circuit component within the variable region; and a fixed region that is free from the layout modification, and includes a circuit such as a CPU core and peripheral functional section whose signal transfer characteristics are known when the circuit is considered as a closed circuit. It can reduce the manpower required for the layout modification and characteristic verification and evaluation of the circuit involved in the layout modification.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.