Method for defining a minimum pitch in an integrated circuit beyond photolithographic resolution
US6955961B1 · kind B1 · utility
196Cited by
4References
63Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 27, 2004 |
| Grant date | Oct 18, 2005 |
| Priority date | — |
| Expiry date | May 29, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/947
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for defining a minimum pitch in an integrated circuit beyond photolithographic resolution controls the defined pitches of the target layer by use of polymer spacer, photo-insensitive polymer plug and polymer mask during the process, so as to achieve the minimum pitch of the target layer beyond photolithographic resolution. Applied to memory manufacture, this method is capable of simultaneously overcoming the process difficulty of significant difference between polysilicon pitches in memory array region and periphery region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.