Low cost high density rectifier matrix memory
US6956757B2 · kind B2 · utility
20Cited by
2References
4Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 22, 2001 |
| Grant date | Oct 18, 2005 |
| Priority date | — |
| Expiry date | Feb 28, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A high density memory device is fabricated three dimensionally in layers. To keep points of failure low, address decoding circuits are included within each layer so that, in addition to power and data lines, only the address signal lines need be interconnected between the layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.