Daniel R. Shepard
88Patents
12h-index
14Co-inventors
81Inventor score
Filing activity: Aug 1, 1988 → Apr 9, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7715953B2 | Trailer backing up device and method | Performing Operations; Transporting | 112 | Active |
| US9132856B2 | Trailer backing up device and table based method | Performing Operations; Transporting | 84 | Active |
| US7183206B2 | Fabrication of semiconductor devices | Electricity | 35 | Expired |
| US5889694A | Dual-addressed rectifier storage device | Electricity | 33 | Expired |
| US6598164B1 | Device and method for reducing piracy of digitized information | Physics | 30 | Expired |
| US6586327B2 | Fabrication of semiconductor devices | Electricity | 26 | Expired |
| US6956757B2 | Low cost high density rectifier matrix memory | Electricity | 20 | Expired |
| US9305624B2 | Vertical switch three-dimensional memory array | Electricity | 19 | Active |
| US5673218A | Dual-addressed rectifier storage device | Electricity | 18 | Expired |
| US4872420A | Disposable cat litter system | Human Necessities | 16 | Expired |
| US7149934B2 | Error correcting memory access means and method | Physics | 15 | Expired |
| US8773881B2 | Vertical switch three-dimensional memory array | Electricity | 14 | Active |
| US7376008B2 | SCR matrix storage device | Emerging Cross-Sectional Technologies | 9 | Expired |
| US7652916B2 | SCR matrix storage device | Emerging Cross-Sectional Technologies | 8 | Active |
| US6216620A | Method and apparatus for high-speed lacing of a teabag | Performing Operations; Transporting | 8 | Expired |
| US9679946B2 | 3-D planes memory device | Electricity | 7 | Active |
| US8378456B1 | Unified switch array for memory devices | Electricity | 7 | Active |
| US7593246B2 | Low cost high density rectifier matrix memory | Electricity | 7 | Active |
| US9570516B2 | Method for forming PCM and RRAM 3-D memory cells | Electricity | 7 | Active |
| US10192616B2 | Ovonic threshold switch (OTS) driver/selector uses unselect bias to pre-charge memory chip circuit and reduces unacceptable false selects | Physics | 7 | Active |
| US6213040A | Apparatus for high-speed lacing of an article | Performing Operations; Transporting | 6 | Expired |
| US7813157B2 | Non-linear conductor memory | Physics | 6 | Active |
| US9735151B1 | 3D cross-point memory device | Electricity | 6 | Active |
| US7460384B2 | Low cost high density rectifier matrix memory | Electricity | 6 | Active |
| US6343558B1 | Shuttle apparatus for high-speed lacing of an article | Textiles; Paper | 6 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.