Instruction set extension using operand bearing NOP instructions
US6957321B2 · kind B2 · utility
36Cited by
8References
38Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 19, 2002 |
| Grant date | Oct 18, 2005 |
| Priority date | — |
| Expiry date | Sep 12, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30185
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Instruction set extension using operand bearing no-operation (NOP) or other instructions. In one embodiment, an apparatus can execute a first instruction with an operand associated with a second instruction. The apparatus includes a decoder to identify an operand associated with the second instruction as being designated for the first instruction. An execution unit executes an operation indicated by the first instruction to operate on the operand associated with the second instruction. The second instruction may occur before or after the first instruction in the program sequence.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.