Method and apparatus for embedded built-in self-test (BIST) of electronic circuits and systems
US6957371B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 10, 2002 |
| Grant date | Oct 18, 2005 |
| Priority date | — |
| Expiry date | Aug 1, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318555
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An embedded electronic system built-in self-test controller architecture that facilitates testing and debugging of electronic circuits and in-system configuration of programmable devices. The system BIST controller architecture includes an embedded system BIST controller, an embedded memory circuit, an embedded IEEE 1149.1 bus, and an external controller connector. The system BIST controller is coupled to the memory circuit and the IEEE 1149.1 bus, and coupleable to an external test controller via the external controller connector. The external test controller can communicate over the IEEE 1149.1 bus to program the memory and/or the system BIST controller circuitry, thereby enabling scan vectors to be debugged by the external test controller and then downloaded into the memory for subsequent application to a unit under test by the system BIST controller.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.