Method and apparatus for improving adhesion between layers in integrated devices
US6958290B2 · kind B2 · utility
0Cited by
22References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 3, 2002 |
| Grant date | Oct 25, 2005 |
| Priority date | — |
| Expiry date | Aug 4, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In an integrated device, a via is formed in a substrate layer and a barrier layer is formed on the substrate layer in the via. A seed layer is formed on the barrier layer in the via. The seed layer includes a first material and a second material. The first material provides an ability for the second material to maintain an adherence to the barrier layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.