Richard Allen Faust
12Patents
4h-index
18Co-inventors
53Inventor score
Filing activity: Jun 28, 2001 → Dec 9, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6680249B2 | Si-rich surface layer capped diffusion barriers | Electricity | 8 | Expired |
| US9455312B2 | Multiple depth vias in an integrated circuit | Electricity | 5 | Active |
| US7655555B2 | In-situ co-deposition of Si in diffusion barrier material depositions with improved wettability, barrier efficiency, and device reliability | Electricity | 5 | Expired |
| US6927159B2 | Methods for providing improved layer adhesion in a semiconductor device | Electricity | 4 | Expired |
| US6720255B1 | Semiconductor device with silicon-carbon-oxygen dielectric having improved metal barrier adhesion and method of forming the device | Electricity | 3 | Expired |
| US9082649B2 | Passivation process to prevent TiW corrosion | Electricity | 1 | Active |
| US8980723B2 | Multiple depth vias in an integrated circuit | Electricity | 1 | Active |
| US8258041B2 | Method of fabricating metal-bearing integrated circuit structures having low defect density | Electricity | 1 | Active |
| US12159846B2 | Process flow for fabrication of cap metal over top metal with sinter before protective dielectric etch | Electricity | 0 | Active |
| US6958290B2 | Method and apparatus for improving adhesion between layers in integrated devices | Electricity | 0 | Expired |
| US7215000B2 | Selectively encased surface metal structures in a semiconductor device | Electricity | 0 | Expired |
| US9230887B2 | Multiple depth vias in an integrated circuit | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.