Magnetic random access memory cell
US6958502B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 22, 2003 |
| Grant date | Oct 25, 2005 |
| Priority date | — |
| Expiry date | Nov 28, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B61/22
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A memory cell for use in a magnetic random access memory (MRAM) circuit includes at least first and second transistors formed in a semiconductor layer. A first insulating layer is formed on at least a portion of the first and second transistors. The memory cell further includes a first magnetic storage element formed on at least a portion of the first insulating layer, at least a second insulating layer formed on at least a portion of the first magnetic storage element, and at least a second magnetic storage element formed on at least a portion of the second insulating layer. The first and second magnetic storage elements are electrically connected to the first and second transistors, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.