Method for calibrating semiconductor devices using a common calibration reference and a calibration circuit
US6958613B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2003 |
| Grant date | Oct 25, 2005 |
| Priority date | — |
| Expiry date | Oct 3, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2254
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Interface parameters for a plurality of semiconductor devices, particularly parameters for output drivers (i.e. on chip driver) and terminations (i.e. on die termination) for double data rate dynamic random access memories, are aligned using a calibration reference which is common to the semiconductor devices and is connected to calibration connections on the semiconductor devices. The semiconductor devices are calibrated in succession, in each case individually, and the calibration connection on the respective semiconductor device which is currently performing calibration is connected to an internal calibration unit by an internal switching unit in the process, and the calibration connections on all other semiconductor devices are terminated to a high impedance internally.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.