Cache memory operation
US6959363B2 · kind B2 · utility
9Cited by
7References
36Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 22, 2002 |
| Grant date | Oct 25, 2005 |
| Priority date | — |
| Expiry date | May 9, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/6026
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A cache memory comprises a fetch engine arranged to issue fetch requests for accessing data items from locations in a main memory identified by access addresses in a program being executed, a pre-fetch engine controlled to issue pre-fetch requests for speculatively accessing pre-fetch data items from locations in said main memory identified by addresses which are determined as being a number of locations from respective ones of said access addresses, and a calibrator arranged to selectively vary said number of locations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.