Methods of making microelectronic packages
US6959489B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 19, 2001 |
| Grant date | Nov 1, 2005 |
| Priority date | — |
| Expiry date | Dec 25, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49169
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method of making a microelectronic package includes providing a substrate having a plurality of conductive leads at a first surface of the substrate. The conductive leads may have first ends permanently attached to the substrate and second ends remote from the terminal ends, the second ends being movable relative to the first ends of the leads. One or more microelectronic elements having contact bearing surfaces and back surfaces remote therefrom may be juxtaposed with the substrate and the contacts connected with the first ends of the leads. A substantially rigid plate may be attached to the back surfaces of the microelectronic elements. The substantially rigid plate may be moved to a precise height above the substrate to vertically extend the leads. While the plate is maintained at the precise height above the substrate, a spacer material is dispensed between the plate and the substrate. The spacer material is then at least partially cured for holding the plate at the precise height above the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.