Circuit and method for generating a clock signal
US6960950B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 25, 2003 |
| Grant date | Nov 1, 2005 |
| Priority date | — |
| Expiry date | Mar 25, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/0997
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In some embodiments, a circuit includes an oscillator circuit and a control circuit. The oscillator circuit generates a clock signal and includes a plurality of selectable delay circuits. The control circuit receives the clock signal from the oscillator and a reference signal. The control circuit provides a control signal to the oscillator circuit to activate one or more of the plurality of selectable delay circuits to change the frequency of the clock signal. In some embodiments, a method includes generating a clock signal in an oscillator circuit, processing the clock signal to generate a control signal, and activating one or more of a plurality of selectable delay circuits in the oscillator circuit, in response to the control signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.