Patent · US Expired

Method for fabricating a semiconductor structure

US6967133B2 · kind B2 · utility

2Cited by

3References

15Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Jurgen Amon · Dresden, DE
Jurgen Faul · Radebeul, DE
Ulrike Gruening · Wappingers Falls, US
Frank Jakubowski · Dresden, DE
Thomas Schuster · Ottenbach, DE
Rudolf Strasser · Baoshan, TW

Key dates

Filing date	Oct 29, 2003
Grant date	Nov 22, 2005
Priority date	—
Expiry date	Oct 29, 2023

Classification

Technology area (CPC H)Electricity
CPC primaryH10D30/0221
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

The present invention provides a method for fabricating a semiconductor structure having a plurality of gate stacks (GS1, GS2, GS3, GS4) on a semiconductor substrate (10), having the following steps: application of the gate stacks (GS1, GS2, GS3, GS4) to a gate dielectric (11) above the semiconductor substrate (10); formation of a sidewall oxide (17) on sidewalls of the gate stacks (GS1, GS2, GS3, GS4); application and patterning of a mask (12) on the semiconductor structure; and implantation of a contact doping (13) in a self-aligned manner with respect to the sidewall oxide (17) of the gate stacks (GS1, GS2) in regions not covered by the mask (12).

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.