Semiconductor wafer grinding method
US6969302B1 · kind B1 · utility
1Cited by
6References
2Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 16, 2000 |
| Grant date | Nov 29, 2005 |
| Priority date | — |
| Expiry date | Feb 11, 2022 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB24B7/228
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
To reduce the wafer production cost by grinding a sliced semiconductor wafer at a high accuracy and a high efficiency and supplying the wafer to the next polishing step. A semiconductor wafer is rough ground between grindstones by a fixed grindstone. After rough grinding, finish grinding by free abrasive grain is performed on the same grinding axis by supplying a slurry which suspends fine abrasive grain between the grindstones through slurry pipes. To perform finish grinding by free abrasive grains, a rotational speed and a feed rate of the grindstones are lowered to lower the grinding action by a fixed grindstone.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.